home products company partners clients news careers contact us
arc4 rc4 fpga asic core

ARC4 cores

Overview

ARC4 (or "Alleged" RC4, which is fully compatible with RC4) is a widely used stream cipher which forms part of popular protocols such as Secure Sockets Layer (SSL) (used to protect Internet traffic) and WEP and WPA/TKIP (used to secure legacy 802.11 wireless networks). RC4 was designed by Ron Rivest of RSA Security in 1987, and the algorithm remains an RSA trade secret, but compatible implementations called ARC4 may be used where RC4 is specified.

Helion ARC4 Solutions

Helion has developed a highly efficient ARC4 core, aimed at mid-rate data throughputs and offering extremely low area in any target silicon. This core has been well proven in production silicon, and is mature and extremely easy to use.

Features
  • Offers Encrypt, Decrypt and Key initialisation operations
  • External 8-bit datapath
  • Extremely low area
  • Standard version runs at a rate of 3 clocks per byte
  • Special higher rate versions also available
As mentioned above, the ARC4 algorithm is used in some legacy 802.11 applications as part of the WEP and WPA (TKIP) protocols. Helion has efficient hardware solutions in place for these applications; check out our WEP/TKIP pages for more information.

Datasheets

For full details of the Helion ARC4 core, please download the datasheet appropriate to your target technology.

Click here for the Xilinx FPGA core data sheet (PDF format)

Please contact Helion for ASIC, Microsemi (Actel) and Altera datasheets.

Contact

For more detailed information on this or any of our other products and services, please feel free to email us at helioncores@heliontech.com and we will be pleased to discuss how we can assist with your individual requirements.


Copyright © Helion Technology Limited, 1998-2014. All rights reserved. Privacy and Cookies
Web Site Developed by Goldstag Limited