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aes-ccm fpga asic core

AES-CCM cores

Overview

AES-CCM is an authenticated encryption algorithm designed to provide both authentication and privacy. Developed by Russ Housley, Doug Whiting and Niels Ferguson, CCM is based on two "classic" block cipher modes in combination; Counter Mode (for the encryption) and CBC-MAC (for the authentication). AES-CCM is used in many recent standards such as 802.11, 802.15 and 802.16 wireless, G.9961/G.hn home networking, plus the IEEE 1619.1 standard for tape storage, and is a very compelling choice for many applications.

Helion AES-CCM Solutions

Helion offer a broad selection of AES-CCM solutions, which can be chosen according to your exact requirements. This allows the user to have a very well matched solution, without having to compromise in terms of area or performance.

These high performance AES-CCM cores are available in versions for use in ASIC, Altera, Microsemi (Actel) and Xilinx FPGA, and in common with all Helion IP cores they have been designed with each technology firmly in mind to yield the very best and most efficient results.

Core name 8-bit wide I/O 32-bit wide I/O 128-bit wide I/O
12-cycle AES-CCM N/A N/A
24-cycle AES-CCM N/A
48-cycle AES-CCM N/A
96-cycle AES-CCM N/A

The table above shows the selection of standard AES-CCM solutions currently available from Helion. The core name reflects the nominal number of clock cycles taken to encrypt or decrypt each 16-byte block of information with a 128-bit key; so for example, the 12-cycle core processes each 128-bit AES block in 12 clock cycles, and has a throughput of 10.66Mbps per MHz.

The table also shows that we can offer various interface widths for each of our AES-CCM cores, so that the most appropriate can be chosen for each given application. The table entries marked "N/A" are not available, as they simply don't make sense due to throughput or area constraints.

Other variants are also available, for example we have a special 11-cycle solution specifically designed for use in ASIC, and some lower-area mid-rate solutions not shown which are for use in FPGA, plus a dedicated G.9961/G.hn frame encryption version.

Helion's AES-CCM cores can also support the CCM* algorithm. This is a slightly modified version of the original standard, offering encryption-only and authentication-only modes, and is as used in some of the 802.15 standards (e.g. 802.15.4 / ZigBee™).

Helion was the first company in the world to offer a commercial AES-CCM solution back in 2002, so by now these cores are mature and extremely well proven in production silicon. Since launch they have been further refined to make them even more efficient and easy to use.

To find out how these AES-CCM solutions can be used in your particular application, please contact Helion so that we can discuss the options in more detail.

Measured Area and Performance
48-cycle 128-bit key version - for low/mid rate applications

TARGET TYPICAL THROUGHPUT AREA
ASIC (0.13um CMOS) >800 Mbps <19k gates
Altera FPGA (Stratix II -3) >630 Mbps 863 ALMs & 5 M4Ks
Microsemi FPGA (ProASIC3 -2) >320 Mbps 3366 tiles & 5 RAMs
Xilinx FPGA (Spartan-6 -3) >570 Mbps 272 slices
Xilinx FPGA (Virtex-5 -3) >780 Mbps 343 slices
Xilinx FPGA (Virtex-6 -3) >870 Mbps 295 slices
Xilinx FPGA (Kintex-7 -3) >1000 Mbps 296 slices
Xilinx FPGA (Virtex-7 -3) >1000 Mbps 296 slices

Remember that this is just one example from a suite of many AES-CCM solutions we have available, so if you are looking for smaller CCM cores, or faster CCM cores, please check out the datasheet below, or contact us for full information.

Product Briefs

For full details of all the Helion AES-CCM cores, please download the appropriate Product Brief in PDF format below.

AES-CCM Cores - ASIC
AES-CCM Cores - FPGA

Contact

For more detailed information on this or any of our other products and services, please feel free to email us at helioncores@heliontech.com and we will be pleased to discuss how we can assist with your individual requirements.

Product Brief Quicklinks
AES-CCM Cores - ASIC
AES-CCM Cores - FPGA

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